A. increased fan out
B. increased fan in
C. decreased fan out
D. decreased fan in
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Digital logic Design MCQs
The process to avoid saturating the switching transistor is performed by ___________.
A. Baker clamp
B. James r. Biard
C. Chris brown
D. Totem-pole
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The way to speed up dtl is to add an across intermediate resister is ___________.
A. Small “speed-up” capacitor
B. Large “speed-up” capacitor
C. Small “speed-up” transistor
D. Large” speed-up” transistor
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The dtl propagation delay is relatively ___________.
A. Large
B. Small
C. Moderate
D. Negligible
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The full form of ctdl is ___________.
A. Complemented transistor diode logic
B. Complemented transistor direct logic
C. Complementary transistor diode logic
D. Complementary transistor direct logic
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How many stages a dtl consist of?
A. 2
B. 3
C. 4
D. 5
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In dtl amplifying function is performed by ___________.
A. Diode
B. Transistor
C. Inductor
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In dtl logic gating function is performed by ___________.
A. Diode
B. Transistor
C. Inductor
D. Capacitor
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Diode–transistor logic (dtl) is the direct ancestor of _____________.
A. Register-transistor logic
B. Transistor–transistor logic
C. High threshold logic
D. Emitter coupled logic
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The minimum number of transistors can be used by 2input and gate is __________.
A. 2
B. 3
C. 4
D. 5
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