A. increased fan out
B. increased fan in
C. decreased fan out
D. decreased fan in
View AnswerB. increased fan in
Digital logic Design MCQs
The process to avoid saturating the switching transistor is performed by ___________.
A. Baker clamp
B. James r. Biard
C. Chris brown
D. Totem-pole
View AnswerA. Baker clamp
The way to speed up dtl is to add an across intermediate resister is ___________.
A. Small “speed-up” capacitor
B. Large “speed-up” capacitor
C. Small “speed-up” transistor
D. Large” speed-up” transistor
View AnswerA. Small “speed-up” capacitor
The dtl propagation delay is relatively ___________.
A. Large
B. Small
C. Moderate
D. Negligible
View AnswerA.Large
The full form of ctdl is ___________.
A. Complemented transistor diode logic
B. Complemented transistor direct logic
C. Complementary transistor diode logic
D. Complementary transistor direct logic
View AnswerA. Complemented transistor diode logic
How many stages a dtl consist of?
A. 2
B. 3
C. 4
D. 5
View AnswerB. 3
In dtl amplifying function is performed by ___________.
A. Diode
B. Transistor
C. Inductor
View AnswerB. Transistor
In dtl logic gating function is performed by ___________.
A. Diode
B. Transistor
C. Inductor
D. Capacitor
View AnswerA. Diode
Diode–transistor logic (dtl) is the direct ancestor of _____________.
A. Register-transistor logic
B. Transistor–transistor logic
C. High threshold logic
D. Emitter coupled logic
View AnswerB. Transistor–transistor logic
The minimum number of transistors can be used by 2input and gate is __________.
A. 2
B. 3
C. 4
D. 5
View AnswerA. 2